PCB Cybersecurity in Hardware Design: Preventing Side-Channel Attacks and Hardware Trojans

PCB Cybersecurity in Hardware Design: Preventing Side-Channel Attacks and Hardware Trojans

When engineers discuss cybersecurity, the conversation typically centers on software — firmware vulnerabilities, network protocols, cryptographic implementations, and operating system hardening. The PCB sitting beneath all of that software is rarely part of the threat model. It should be.

Side-channel attacks exploit the physical behavior of circuits to extract secrets that software protections cannot hide. Hardware trojans introduce malicious functionality into the board itself, below the firmware layer where no software security tool can reach them. Both attack categories are active threats in 2026, targeting defense electronics, payment hardware, industrial control systems, medical devices, and any other application where cryptographic keys or operational data have value to an adversary.

Defending against these threats requires security to be designed into the PCB from the earliest stage of the hardware development process — and it requires manufacturing partners who understand what supply chain integrity means for security-critical hardware.


Understanding Side-Channel Attacks on PCB Hardware

A side-channel attack does not attempt to break the mathematics of a cryptographic algorithm. It instead measures the physical behavior of the hardware executing that algorithm and uses those measurements to infer secret information — specifically the cryptographic keys that the algorithm protects.

Three side-channel vectors are most relevant at the PCB level.

Power Analysis Attacks

Every logic gate switching state in a digital circuit consumes a measurable amount of current. The total power consumption of a cryptographic device at any moment depends on the data being processed and the operations being performed. Simple Power Analysis reads single power consumption traces to identify operations directly. Differential Power Analysis applies statistical methods across many traces, correlating power consumption measurements with hypothetical key values to identify the correct key with high confidence. A practical DPA attack on an unprotected device can recover a 128-bit AES key from a few thousand power traces — an amount collectable in seconds with standard measurement equipment.

The PCB’s power delivery network is the primary attack surface for power analysis. Any point on the PCB where an attacker can measure voltage across a known resistance — a sense resistor, a power plane via, or even the parasitic resistance of a trace — provides access to the power consumption signal. The layout of the power delivery network, the placement of decoupling capacitors, and the impedance profile of the power distribution system all directly influence how much information leaks through power measurements.

Electromagnetic Side-Channel Attacks

Electromagnetic attacks measure the radio frequency emissions from switching circuits — emissions that carry the same data-dependent information as the power consumption signal but can be measured without physical contact using a near-field probe positioned close to the PCB. EM attacks are in some respects more dangerous than power attacks because they do not require access to the power supply lines and can be performed at greater physical distance. A fine-grain EM probe positioned over a specific IC package can isolate the EM emissions from that device independently of everything else on the board, providing a cleaner signal than the aggregate power measurement.

Timing Attacks

Timing attacks exploit variations in the time taken to execute cryptographic operations — variations that depend on the key value being used. At the PCB level, timing information is observable through power traces, EM emissions, or direct clock measurement. Countermeasures at the algorithm level — constant-time implementations — are the primary defense, but PCB-level noise injection and clock randomization support these software-level measures.


PCB Layout Countermeasures for Side-Channel Attack Prevention

Several PCB design and layout techniques reduce the information available to side-channel attackers at the hardware level.

Power Distribution Network Hardening

The most direct PCB-level countermeasure for power analysis attacks is reducing the impedance of the power delivery network around the cryptographic circuit, making it harder for an attacker to obtain a clean power measurement. Placing high-quality decoupling capacitors — a combination of bulk capacitance for low-frequency filtering and small ceramic capacitors for high-frequency decoupling — immediately adjacent to the power and ground pins of the secure element reduces the voltage ripple that carries the power consumption signal. Dedicated power and ground planes for the cryptographic circuit, isolated from the rest of the board’s power distribution, reduce coupling between the secure circuit’s power consumption and accessible measurement points.

For higher security requirements, power supply decoupling circuits that isolate the internal power rail of the cryptographic module from the main board supply remove the direct correlation between the logic switching activity and the observable power consumption on the main supply rail. Voltage noise injection — introducing controlled random noise into the power supply — further masks the data-dependent power signature, increasing the number of traces an attacker must collect to a statistically impractical level.

Electromagnetic Emission Reduction Through Layout

EM side-channel emissions are reduced through layout choices that minimize the area of current loops, since the radiated field strength is proportional to loop area and current magnitude. Placing signal layers adjacent to ground planes, using ground plane stitching vias around the perimeter of cryptographic circuits, and routing return currents directly beneath their signal traces all reduce the effective loop area and the radiated EM signal.

Metal shielding cans placed over security-critical ICs provide a Faraday cage that attenuates EM emissions from the enclosed circuit. Edge guard rings and via fences around security-critical zones reduce radiation from PCB edge effects. For the highest security requirements, conductive enclosures around the entire security module — implemented as a shielded box on the PCB surface — provide the most effective EM isolation.

Routing high-speed cryptographic data buses on inner layers rather than outer layers reduces the accessible EM probe cross-section and requires an attacker to use more sophisticated measurement equipment to obtain a useful signal.

Disabling Debug Interfaces in Production

Every exposed debug interface — JTAG, SWD, UART test points, boundary scan connectors — is a potential side-channel attack entry point as well as a direct firmware extraction vector. Security-critical PCBs should have all debug interfaces physically removed or shorted in production versions. If test points are required for manufacturing test, they should be designed to be severed or covered after testing is complete, with this step documented as a mandatory production process.


Hardware Trojans: The Threat Inside the Supply Chain

A hardware trojan is a malicious modification introduced into a PCB at some point between design and deployment. At the PCB level, trojans take several forms. An additional component — a small IC, a passive component, or a modified connector — can be added to the board without authorization. An existing component can be substituted for a lookalike that performs the legitimate function while also performing a covert one. Traces on inner layers can be modified to create unauthorized signal paths. In the most sophisticated attacks, these modifications are designed to lie dormant under normal operating conditions, activating only when a specific trigger — a date, a data pattern, a command sequence — is received.

The consequences of a hardware trojan range from data exfiltration through an unauthorized wireless transmitter hidden on the board to denial of service through a delayed component failure to complete system compromise through an unauthorized management interface that bypasses all software security controls.

Hardware Trojan Detection Strategies

No single detection method reliably catches all hardware trojan variants, which is why a layered detection approach is the current best practice.

X-ray inspection can reveal unauthorized components hidden under existing devices, additional traces on inner layers, and modifications to via structures that are not visible from the board surface. X-ray provides a non-destructive way to compare a suspect board against a known-good reference board, making it the most practical screening tool for high-value boards where per-unit inspection cost is justified.

Power consumption monitoring using machine learning methods has demonstrated high detection accuracy for PCB-level hardware trojans. Research has shown F1-score detection accuracy above 99.7% for trojans consuming as little as 50 mW by training a machine learning classifier on the normal power consumption profile of the board and flagging deviations. Real-time monitoring of power consumption patterns during operation can detect trojans even after deployment, providing an ongoing detection capability rather than a single point of inspection.

JTAG boundary scan testing verifies the logical state of all boundary-scan capable components on the board against the expected netlist, detecting component substitutions that change logical behavior even when the physical appearance of the board is unchanged.

Optical inspection comparing each board against a golden reference board — either manually or through automated vision systems — detects added components, substituted markings, and visible trace modifications. Automated vision inspection is scalable for production volumes; manual inspection is practical for very high-security, low-volume programs.


Supply Chain Security: Where Hardware Trojans Enter

The most important hardware trojan countermeasure is not detection after the fact — it is preventing introduction in the first place through supply chain security practices.

Components sourced from authorized distributors with unbroken traceability to original manufacturers are significantly lower risk than components sourced from gray-market channels where remarking and substitution are common. SAE AS5553 and AS6171 provide frameworks for authorized distributor qualification and incoming component inspection protocols that apply directly to security-critical PCB programs.

Bill of Materials lock-down — defining approved manufacturer and approved distributor lists for every component on a security-critical board and enforcing those lists through procurement controls — prevents component substitution at the sourcing level. Any change to the approved component list for a security-critical design should require a formal engineering change process with documented justification.

The PCB manufacturer itself is a potential trojan introduction point. A manufacturer with uncontrolled access by subcontractors, undocumented production process steps, or component sourcing practices that fall outside approved distributor lists represents a supply chain risk that no amount of post-production inspection can fully compensate for.


How to Choose the Right Manufacturer for Cybersecurity-Critical PCBs

Selecting a manufacturing partner for security-critical PCBs requires evaluating supply chain security practices as explicitly as manufacturing capability.

  • Authorized component sourcing with traceability. Confirm that the manufacturer sources all components from authorized distributors and can provide component-level traceability documentation linking every part to its original manufacturer. A manufacturer who cannot provide this documentation creates an unverifiable gap in the supply chain security chain.
  • Controlled production environment. The manufacturer’s facility should have access controls on design files and production floor access, documented procedures for handling security-sensitive designs, and restrictions on unauthorized personnel or subcontractor access to production lines for critical programs.
  • X-ray inspection capability. For security-critical boards, X-ray inspection is not an optional quality upgrade — it is a required detection tool for hidden modifications. Confirm the manufacturer has X-ray capability and uses it on high-security board categories.
  • Full traceability documentation per board. Individual board-level records — material lot, component batch, process parameters, test results — provide the audit trail needed for security incident investigation and ongoing supply chain verification.
  • HDI and fine-line capability. Routing cryptographic signals on inner layers and implementing the layout countermeasures described above requires multilayer HDI capability. A manufacturer limited to simple through-hole construction cannot support the architectural security features that critical boards require.
  • Global shipping with consistent documentation. Security-critical hardware programs often span global supply chains, with design teams, security evaluation labs, and system integrators in different countries. A manufacturer who ships internationally as a standard capability, with consistent chain-of-custody documentation across all shipments, ensures that supply chain security is maintained from the factory floor to the integration facility wherever in the world that may be.

MorePCB provides the manufacturing depth that cybersecurity-critical PCB programs require. MorePCB’s capabilities cover multilayer boards, HDI with blind and buried vias, rigid-flex, flexible circuits, and heavy copper designs — the construction types most relevant to secure hardware design. MorePCB ships globally, so whether your cybersecurity-critical boards need to reach a security evaluation lab in Europe, a defense integrator in North America, or an industrial control systems facility in Asia, delivery is handled reliably from a single accountable manufacturing source.

Review MorePCB’s complete capabilities, layer count options, inspection services, and quality certifications at morepcb.com/capabilities.


Conclusion

PCB cybersecurity is not a software problem with a hardware symptom. Side-channel attacks and hardware trojans are native hardware threats that require hardware countermeasures — built into the PCB layout, the power delivery network, the component selection, and the manufacturing supply chain from the earliest stage of design.

The engineers and program managers who take hardware security seriously from day one spend the engineers and program managers who take hardware security seriously from day one spend significantly less time and money on remediation than those who treat it as an afterthought. The countermeasures are well understood, the manufacturing capability to implement them exists, and the supply chain security practices that prevent hardware trojan introduction are straightforward to specify and enforce. The only variable is whether the design team and their manufacturing partner treat them as mandatory requirements from the start.


FAQ

Q: What is a side-channel attack and how does it differ from a software cyberattack on a PCB?

A: A side-channel attack does not target software vulnerabilities, firmware code, or network protocols. Instead, it exploits the physical behavior of the hardware executing cryptographic operations — specifically the power consumption, electromagnetic emissions, or timing characteristics of circuits — to infer secret information such as cryptographic keys. While a software attack tries to defeat the algorithm or exploit a code vulnerability, a side-channel attack bypasses the algorithm entirely by observing how the hardware behaves while the algorithm runs. This makes side-channel attacks particularly dangerous because software patches and firmware updates cannot fix a hardware-level information leakage problem. A device running a perfectly correct, mathematically secure implementation of AES can still leak its key through power analysis if the PCB layout and power distribution network are not designed to reduce observable power consumption variation. Countermeasures must be implemented at the hardware design level — in the PCB layout, the power delivery architecture, and the shielding strategy — not in software.


Q: How does differential power analysis extract a cryptographic key from a PCB?

A: Differential Power Analysis works by collecting a large number of power consumption traces from the target device while it performs cryptographic operations on different input data, then applying statistical analysis to find the correlation between those power traces and hypothetical key values. Every logic gate in a digital circuit consumes slightly different amounts of current depending on whether it is switching from zero to one or one to zero. This data-dependent power consumption means that the total current drawn by a cryptographic circuit at any moment contains information about the intermediate values being computed — which in turn depend on the secret key. DPA collects many traces, hypothesizes a value for a portion of the key, predicts what the power consumption should look like if that hypothesis is correct, and compares the prediction against the actual measured traces. When the hypothesis is wrong, the correlation is near zero. When the hypothesis matches the actual key value, a strong correlation appears. Repeating this process for each portion of the key recovers the complete key. On an unprotected device, as few as a few thousand traces — collectable in seconds — can be sufficient to recover a full 128-bit AES key.


Q: What PCB layout techniques are most effective at reducing electromagnetic side-channel leakage?

A: Electromagnetic side-channel emissions are proportional to the area of current loops and the magnitude of the switching currents that create them. The most effective PCB layout countermeasures reduce both. Placing signal layers immediately adjacent to ground planes reduces current loop area by bringing the return current path as close as possible to the signal current path, which causes the radiated fields from the signal and return to partially cancel. Using ground plane stitching vias densely around the perimeter of security-critical circuit areas contains EM emissions within a defined boundary and reduces radiation from PCB edge effects. Routing cryptographic data buses and clock signals on inner layers instead of outer surface layers reduces the accessible probe cross-section, requiring more sophisticated near-field measurement equipment to obtain a usable signal. Metal shielding cans placed directly over security-critical ICs provide a Faraday cage that physically attenuates EM emissions from the enclosed component. For the highest security requirements, conductive enclosures around the entire secure processing zone — implemented as a shielded compartment at the board level — combined with ferrite filtering on all signals entering and leaving the zone provide the most comprehensive EM isolation available in a production PCB design.


Q: What is a hardware trojan in the context of PCB design and how can it be introduced into a board?

A: A hardware trojan is a malicious modification introduced into a PCB at any point between the original design and the deployed end product. At the PCB level, trojans can take several forms. An unauthorized component — an additional IC, passive component, or modified connector — can be added to the board during manufacturing or rework. An existing component can be substituted with a lookalike that performs the legitimate function while also exfiltrating data, creating a covert communication channel, or waiting for a trigger to disable the system. Traces on inner layers can be modified to create unauthorized signal paths that are invisible to surface inspection. The most sophisticated trojan designs lie dormant under normal operating conditions and activate only when a specific trigger is received — a particular date, a data pattern, or an externally transmitted command — making them extremely difficult to detect through functional testing alone. Hardware trojans can be introduced by a malicious actor at the manufacturer’s facility, through component substitution in the supply chain, during board rework or repair, or through a compromised design file that specifies the unauthorized modification before production even begins.


Q: How is machine learning being used to detect hardware trojans in PCBs at runtime?

A: Machine learning-based hardware trojan detection works by establishing a baseline model of the normal power consumption behavior of a board under its expected operating conditions, then monitoring live power consumption patterns during operation and flagging statistically significant deviations from that baseline as potential trojan activity. Research has demonstrated that this approach can detect PCB-level hardware trojans with F1-score accuracy above 99.7% for trojans consuming as little as 50 milliwatts — a very small additional power draw that would be invisible to manual inspection or simple threshold-based monitoring. The machine learning model is trained on power consumption data from known-good boards across a representative range of operating conditions, then deployed on the target system where it monitors the power distribution network in real time. Because the detection is based on behavioral anomalies rather than knowledge of the specific trojan design, the approach is payload-invariant — it can detect trojans regardless of what function they are performing, as long as their operation consumes power from the board’s supply. This real-time monitoring approach provides ongoing detection capability after deployment, complementing the pre-deployment X-ray inspection and boundary scan testing that catch trojans before boards enter service.


Q: How do I choose a PCB manufacturer who can support hardware security requirements and supply chain integrity for cybersecurity-critical boards?

A: Qualifying a manufacturer for cybersecurity-critical PCBs requires evaluating supply chain security practices alongside manufacturing capability. Begin with component sourcing — confirm the manufacturer sources all components exclusively from authorized distributors and can provide component-level traceability documentation linking every part to its original manufacturer. Any gap in this traceability is a potential hardware trojan introduction point. Verify that the manufacturer operates a controlled production environment with access management on design files and production floor access, documented procedures for handling security-sensitive programs, and restrictions on unauthorized subcontractor access to production lines for critical orders. Confirm that X-ray inspection is available and used on security-critical board categories — X-ray is the most practical non-destructive screening tool for detecting added components or inner-layer modifications that are invisible to surface inspection. Ask for individual board-level traceability documentation covering material lots, component batches, and test results, since this audit trail is essential for any post-deployment security incident investigation. Verify HDI capability including blind and buried vias, which are required to implement inner-layer signal routing for cryptographic buses and EM emission reduction. Finally, confirm that the manufacturer ships internationally as a standard capability with consistent chain-of-custody documentation — cybersecurity-critical hardware programs routinely span global supply chains, and MorePCB’s global shipping capability ensures your secure boards reach security evaluation labs, defense integrators, and system assemblers anywhere in the world with full documentation continuity. Full capability details are available at morepcb.com/capabilities.

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